What is a Filter? Describe the classification of Filters.

An electrical filter is a circuit which can be designed to modify, reshape or reject all the undesired frequencies of an electrical signal and pass only the desired signals.

In other words, we can say that an electrical filter is usually a frequency selective network that passes a specified band of frequencies and blocks signals of frequencies outside this band.

Classification of Filters

o    Depending on the type of element used in their construction, filters are classified into two types, such as:

1.Passive Filters: A passive filter is built with passive components such as resistors, capacitors and inductors.

2.Active Filters: An active filter makes use of active elements such as transistors, op-amps in addition to resistor and capacitors.

According to the operating frequency range, the filters may be classified as audio frequency (AF) or radio frequency (RF) filters. Filters may also be classified as:

1.Low Pass Filter: The low pass filter only allows low frequency signals from 0 Hz to its cut-off frequency, ƒ_c point to pass while blocking any higher frequency signals.

2.High Pass Filter: The high pass filter only allows high frequency signals from its cut-off frequency, ƒ_c point and higher to infinity to pass through while blocking those any lower.

3.Band Pass Filter: The band pass filter allows signals falling within a certain frequency band set up between two points to pass through while blocking both the lower and higher frequencies either side of this frequency band.

4.Band Stop Filter: The band stop filter blocks signals falling within a certain frequency band set up between two points while allowing both the lower and higher frequencies either side of this frequency band.

Fig. below shows the frequency responses of the four types of filters mentioned above. These are ideal responses and cannot be achieved in actual practice.

Ideal Low Pass Filter

A filter that provides a constant output from d.c. up to a cutoff frequency fc and then passes no signal above that frequency is called an ideal low pass filter.

 

The ideal response of a low pass filter is shown in fig. above.

The voltage gain i.e. the ratio of output voltage to input voltage is constant over a frequency range from zero to cutoff frequency ƒ_c .

Hence, the output will be available faithfully from 0 to fc with constant gain.

The frequencies between 0 and ƒ_c, are called passband frequencies, while the frequencies above fc are called as stopband frequencies.

Therefore, the bandwidth is ƒ_c.

Ideal High Pass Filter

A filter that passes signals above a cutoff frequency ƒ_c   is a high pass filter.

The frequency response of an ideal high pass filter is shown in fig. above.

The high pass filter has a zero gain starting from zero to a frequency ƒ_c  , called the cutoff frequency, and above this frequency, the gain is constant.

Hence, signal of any frequency beyond ƒ_c   is faithfully reproduced with a constant gain, and frequencies from 0 to fc will be blocked.

Ideal Band Pass Filter

When the filter circuit passes signals that are above one cutoff frequency and below a second cutoff frequency, it is called a band pass filter.

The frequency response of an ideal band pass filter is shown in fig. above.

As we can see from the above fig., the band pass filter has a pass band between two cutoff frequencies f_c2 and f_c1, where f_c2> f_c1 and two stop bands: 0<f< f_c1 and f> f_c2.

The bandwidth of the band pass filter is therefore, equal to f_c2 - f_c1, where f_c1 and f_c2 are lower and higher cutoff frequencies respectively.

Ideal Band Stop Filter

The band stop or band reject filter performs exactly opposite to the band pass filter.

It has a band stop between two cut off frequencies f_c2 and f_c1 and two pass bands: 0<f<f_c1 and f>f_c2.

The frequency response of an ideal band stop filter is shown in fig. above.

This is also called as band elimination or notch filter.

Explain 555 timer. Draw its internal diagram and describe the function of its pins.

The 555 timer which gets its name from the three 5kΩ resistors it uses to generate the two comparators reference voltage, is a very cheap, popular and useful precision timing device that can act as either a simple timer to generate single pulses or long time delays, or as a relaxation oscillator producing stabilized waveforms of varying duty cycles from 50 to 100%

The 555 timer chip is extremely robust and stable 8-pin device that can be operated either as a very accurate Monostable, Bistable or Astable Multivibrator to produce a variety of applications such as one-shot or delay timers, pulse generation, LED and lamp flashers, alarms and tone generation, logic clocks, frequency division, power supplies and converters etc.

            A simplified “block diagram” representing the internal circuitry of the 555 timer is given below with a brief explanation of each of its connecting pins to help provide a clearer understanding of how it works.

555 Timer Block Diagram

• Pin   1. –Pin 1. –	GND, connect to ground supply. Round, The ground pin connects the 555 timer to the negative (0v) supply rail.
• Pin 2. –	Trigger, The negative input to comparator No 1. A negative pulse on this pin “sets” the internal Flip-flop when the voltage drops below 1/3Vcc causing the output to switch from a “LOW” to a “HIGH” state.
• Pin 3. –	Output, the output pin can drive any TTL circuit and is capable of sourcing or sinking up to 200mA of current at an output voltage equal to approximately Vcc – 1.5V so small speakers, LEDs or motors can be connected directly to the output.
• Pin 4. –	Reset, this pin is used to “reset” the internal Flip-flop controlling the state of the output, pin 3. This is an active-low input and is generally connected to a logic “1” level when not used to prevent any unwanted resetting of the output.
• Pin 5. –	Control Voltage, this pin controls the timing of the 555 by overriding the 2/3Vcc level of the voltage divider network. By applying a voltage to this pin the width of the output signal can be varied independently of the RC timing network. When not used it is connected to ground via a 10nF capacitor to eliminate any noise.
• Pin 6. –	Threshold, The positive input to comparator No 2. This pin is used to reset the Flip-flop when the voltage applied to it exceeds 2/3Vcc causing the output to switch from “HIGH” to “LOW” state. This pin connects directly to the RC timing circuit.
• Pin 7. –	Discharge, the discharge pin is connected directly to the Collector of an internal NPN transistor which is used to “discharge” the timing capacitor to ground when the output at pin 3 switches “LOW”.
• Pin 8. –	Supply +Vcc, this is the power supply pin and for general purpose TTL 555 timers is between 4.5V and 15V.

What is an LTI system ? Why LTI systems are so important ?

Linear time-invariant (LTI) systems are systems that are both linear and time-invariant.

Linearity states that when a linear combination of the two inputs is fed to the system, the output of the system is a linear combination of the respective outputs.

Let x₁(t) and x₂(t) be any two signals. Suppose that the output of a system to x₁(t) is y₁(t) and the output of the system to x₂(t) is y₂(t). If this always implies that the output of the system to α₁ x₁(t)+α₂ x₂(t) is α₁ y₁(t) + α₂ y₂(t), then the system is linear and the superposition principle is said to hold.

A system is said to be time invariant if when y(t) is the output that corresponds to x(t), then for any τ, y (t − τ) is the output that corresponds to x (t − τ).

LTI systems are so important –

1.     Because many systems encountered in nature can be successfully modeled as LTI systems.

2.      For linear time invariant system, we only need to know the impulse response h(t) of the system (or equivalently frequency response H(ω)) in order to predict the output of the system in response  to any input. This is done by convoluting the input with the impulse response. So a linear time  invariant system is a lot easier to analyze. 

      So LTI systems can be analyzed in considerable detail, providing insight into their properties

      This is not true for nonlinear or time variant system. 

What do you mean by an ideal voltage source ? Do they practically exist ?

“An ideal voltage source is a voltage source that supplies constant voltage to a circuit despite the current which the circuit draws.”

This means that despite the resistance which a load may be in a circuit, the source will still provide constant and steady voltage.

An ideal voltage source has the following characteristic that allows it to act as a 100% efficient source of voltage: it has zero internal resistance.

When an ideal voltage source has zero internal resistance, it can drop all of its voltage perfectly across a load in a circuit. Being that the source has zero internal resistance, none of the power is wasted due to internal resistance. The ideal voltage source can 100% efficiently drop all of its voltage across a load. This is proven by ohm's law. According to ohm's law, voltage is dropped across circuit elements according to the formula, V=IR. If a voltage source has zero internal resistance, it can drop all voltage across a load and none will be wasted internally. This is 100% power efficiency and this is an ideal voltage source.

Being that an ideal voltage source has zero internal resistance, and, thus, 100% efficiency to outputting all of its voltage to a load due to perfect voltage division, its voltage output to a load is steady and constant and doesn't fluctuate even if load resistance values change. Thus, the voltage output by an an ideal voltage source looks like:

Let's examine the following circuit below:

 

R_in, the internal resistance of the battery, is 0Ω. This demonstrates that this battery is an ideal voltage. The resistance load which is in the circuit is 8Ω. The load, therefore, receives all of the 1.5V of the battery. 

This would be an ideal voltage source. However, this does not and cannot exist in real life, because all voltage sources, such as batteries, will have some type internal resistance. Due to voltage sources being physical objects, they will always have some degree of internal resistance which will make some of the voltage be wasted. Some have lower resistance than others, but all will have some resistance.

Real voltage sources, therefore, do have some resistance. This can vary from as little as a few thousandth of an ohm to as much as several ohms, such as 35Ω. This resistance makes the voltage source no longer act ideal. All of its voltage now will not be dropped across the load. Due to the internal resistance, the battery will drop some voltage across itself, leading to wasted power. The lower the resistance, the less wasted power.

Let's examine the same above circuit now with a voltage source with real conditions (some internal resistance):

You see now how this circuit differs from the ideal one. Some power is wasted and there is not 100% efficiency. Because R_in is now 1Ω, there is no longer perfect conditions.

Although ideal voltage sources are impossible to make because all types have some internal resistance, the closer we can get a voltage source to ideal conditions, the more efficient the source will be in supplying voltage with little power waste. So we use ideal sources as models and try to make real components as close to them as possible.

What is difference between Piconet and Scatternet ?

A piconet is the type of connection that is formed between two or more Bluetooth-enabled devices such as modern cell phones or PDAs. Bluetooth enabled devices are "peer units" in that they are able to act as either master or slave. However, when a piconet is formed between two or more devices, one device takes the role of 'master', and all other devices assume a 'slave' role for synchronization reasons. Piconets have a 7 member address space (3 bits, with zero reserved for broadcast), which limits the maximum size of a piconet to 8 devices, i.e. 1 master and 7 slaves.

A scatternet is a number of interconnected piconets that supports communication between more than 8 devices. Scatternets can be formed when a member of one piconet (either the master or one of the slaves) elects to participate as a slave in a second, separate piconet. The device participating in both piconets can relay data between members of both ad hoc networks. However, the basic bluetooth protocol does not support this relaying - the host software of each device would need to manage it. Using this approach, it is possible to join together numerous piconets into a large scatternet, and to expand the physical size of the network beyond Bluetooth's limited range.

Piconet	Scatternet
In this bluetooth network, device can function either as master or slave.	In this bluetooth network, device can function as master or slave or (master+slave)
It serves smaller coverage area.	It serves larger coverage area.
It supports maximum 8 nodes.	It supports more than 8 nodes.
It allows less efficient use of available bluetooth channel bandwidth.	It allows more efficient use of available bluetooth channel bandwidth. Scatternet (master=red, slave=green, parking=blue)

What do you mean by Piconet ?

A piconet is a network of devices connected using Bluetooth technology. The network ranges from two to eight connected devices. When a network is established, one device takes the role of the master while all the other devices act as slaves. 
             Piconet gets its name from the word "pico", which means very small. This very small network is so called because the number is limited to seven devices, plus the master, which limits network and data sharing capability. Data transfer rates vary from 200 to 2,100 kbps at the application. 
                  A piconet is sometimes called a personal area network (PAN) because the range of optimal operation for Bluetooth is 10 meters, about the size of a living room.

What is the Difference Between a FPGA and an ASIC?

Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs) provide different values to designers, and they must be carefully evaluated before choosing any one over the other. Information abounds that compares the two technologies. While FPGAs used to be selected for lower speed/complexity/volume designs in the past, today’s FPGAs easily push the 500MHz performance barrier. With unprecedented logic density increases and a host of other features, such as embedded processors, DSP blocks, clocking, and high-speed serial at ever lower price points, FPGAs are a compelling proposition for almost any type of design.

FPGA vs ASIC Design Advantage: 

FPGA Design
Advantage	Benefit
Faster time-to-market	No layout, masks or other manufacturing steps are needed
No upfront non-recurring expenses (NRE)	Costs typically associated with an ASIC design
Simpler design cycle	Due to software that handles much of the routing, placement, and timing
More predictable project cycle	Due to elimination of potential re-spins, wafer capacities, etc.
Field reprogramability	A new bitstream can be uploaded remotely
ASIC Design
Advantage	Benefit
Full custom capability	For design since device is manufactured to design specs
Lower unit costs	For very high volume designs
Smaller form factor	Since device is manufactured to design specs